Published in Strathclyde Academic Media, 2019
This book aims to demystify a complex heterogeneous system-on-chip (Zynq MPSoC), covering system architecture, design tools and method, and hardware/software co-design. Read more
Published in University of Strathclyde, 2024
PhD thesis discussing the design and application of a combinatorial hardware description language with dependent types and staging Read more
Published in IEEE Access, 2020
A novel software-defined radio environment for interactive prototyping and active teaching. Read more
Published in Trends in Functional Programming (accepted; awaiting publication)', 2025
A new hardware architecture and compiler back-end for a structured combinator-based graph reduction machine Read more
Published in Haskell Symposium', 2024
A simple yet effective hardware garbage collector from the HAFLANG project. Read more
Published in Symposium on Implementation and Application of Functional Languages, 2024
The first HAFLANG paper, discussing our single-core graph reduction processor. Read more
Published in IEEE International Midwest Symposium on Circuits and Systems, 2021
An exploration of a family of filtering circuits, challenging to express in many hardware description languages, using a Haskell-based toolchain. Read more
Published in IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2021, 2021
We advocate for the use of dependently typed languages in hardware description, leaving an implementation later (See totaie) Read more