From Haskell to a New Structured Combinator Processor
Yukang Xie, Craig Ramsay, Robert Stewart, Hans-Wolfgang Loidl
CV
Education
- PhD in Electronic & Electrical Engineering, University of Strathclyde, 2024
- Despite the EEE banner, this was very much an endeavour in computer science research. It culminated in a new functional programming language for hardware description, including dependent types and staging at the type level.
- BEng (Hons) Computer and Electronic Systems, University of Strathclyde, 2017
Work experience
- 2022–2025 Dependable Systems Group — Herriot-Watt University
Research associate on the HAFLANG project. Designing and evaluating a custom processor for lazy functional languages, aiming to improve run-times and energy efficiency. Topics have ranged from language design, compiler construction, garbage collection, hardware description, verification, and parallel systems.
Impacts so far include 3 conference papers, over 8 talks, and a workshop to help consolidate international interest in hardware-accelerated functional programming.
- 2019 AMD/Xilinx Research Labs — Boulder, Colorado
- As part of the research labs, I developed support for the flagship RFSoC platform in the, user and education focused, PYNQ project. This was generally a success, eliciting at least 21 academic citations and adoption in projects including work at Fermilab
- I was also an important part of writing and delivering a slew of workshops targeted at audiences ranging from AMD/Xilinx industry partners to 13 year old students.
- 2016–2017 Fox-IT — Delft, The Netherlands
- Performing a research project in a high assurance setting, investigating EM leakages from FPGA and SoC devices.
- I assessed how information (AES encryption keys, in particular) can be retrieved using measurements with radio hardware, even at significant distance.
- Established relationships with relevant companies, who continue to work with Fox-IT. Published a white-paper and gave a conference presentation on the first public demonstration of such analysis.
- 2016–2018 DSP Enabled Communications Group — University of Strathclyde
Focused mostly on writing a substantial part of the Exploring Zynq MPSoC book, sponsored by AMD/Xilinx.
- This gained at least 53 academic citations, and
- Is already in use as course material for more than 5 external university courses, including Rice University, Trinity College Dublin, Linköping University.
- 2013–2014 Cogent Focus — Perth, Scotland
- Responsible for engineering Microsoft based web applications from design through to maintenance. Working independently, directly with small-business clients.
Publications
Cloaca: A Concurrent Hardware Garbage Collector for Non-strict Functional
Craig Ramsay, Robert Stewart
Heron: Modern Hardware Graph Reduction
Craig Ramsay, Robert Stewart
Low-cost, high-speed parallel FIR filters for RFSoC front-ends enabled by CλaSH
Craig Ramsay, Louise Crockett, Bob Stewart
On Applications of Dependent Types to Parameterised Digital Signal Processing Circuits
Craig Ramsay, Louise Crockett, Bob Stewart
Control and visualisation of a software defined radio system on the Xilinx RFSoC platform using the PYNQ Framework
Joshua Goldsmith, Craig Ramsay, David Northcote, Kenneth Barlee, Louise Crockett, Bob Stewart
Exploring Zynq MPSoC: With PYNQ and Machine Learning Applications
Louise Crockett, David Northcote, Craig Ramsay, Fraser Robinson, Bob Stewart
Talks
Once Bittern, Twice Shy
Conference talk at Scottish Programming Languages Symposium (20th anniversary edition), Glasgow, Scotland
Cloaca: A Concurrent Hardware Garbage Collector for Non-strict Functional Languages
Conference talk at Haskell Symposium 2024, Milan, Italy
Revisiting hardware architectures for lazy functional languages with Heron
Conference talk at Various (incl. Workshop on Hardware Acceleration of Functional and Declarative Languages), Edinburgh, Scotland
Heron: Modern Hardware Graph Reduction
Conference talk at Symposium on Implementation and Application of Functional Languages, Braga, Portugal
Low-cost, High-speed Parallel FIR Filters for RFSoC Front-Ends Enabled by CλaSH
Conference talk at Asilomar Conference on Signals, Systems and Computers (virtual), Pacific Grove, California
On Applications of Dependent Types to Parameterised Digital Signal Processing Circuits
Conference talk at IEEE International Midwest Symposium on Circuits and Systems (virtual), Lansing, Michigan
PYNQ Bootcamp
Workshop at St. Vrain Valley Schools, Longmont, Colorado
PYNQ RFSoC Workshop
Workshop at xSight 20, Los Angeles, California
TEMPEST Attacks Against AES
Conference talk at hardwear.io Hardware Security Conference 2017, The Hauge, The Netherlands
Teaching
Service and leadership
Co-chair, co-organiser, and co-host for a new workshop series, HAFDAL, with Rob Stewart. This re-ignites community spirit around hardware acceleration for functional and declarative programming languages. We enjoyed hosting ~30 in-person attendees and 9 invited talks (whose recordings have accumulated around 2700 views)
I have reviewed papers for the IEEE Access journal on topics bridging logic programming, artificial intelligence, and parallel computing.
I’ve had the pleasure of co-supervising a PhD student, Yukang Xie, who has had a very successful first 6 months, including a paper accepted to TFP 2025.